I remember the first FPGA waving happily to the world in 1985. (I know I’ve talked about this before, but the EE Journal community is always getting new members who weren’t around when many of the technologies we take for granted today first appeared on the scene.) That little rascal was the Xilinx XC2064, which boasted an 8×8=64 array of configurable logic block (CLB) “islands,” each containing two 3-input lookup tables (LUTs), all presented in a “sea” of programmable interconnects.

To make things even more fun and interesting, users had to define the contents of the LUTs and the connections between the CLBs by hand. Automated design tools? That doesn’t make me laugh. Back then, traditional programmable logic devices (PLDs) like PROMS, PLAs, PALs, GALs, etc. were completely deterministic. So much so that, as far as I remember, their datasheets specified different times for rising and falling edges on their inputs, causing rising and falling transitions on their outputs. In comparison, it was almost impossible to even estimate the design-dependent timing of an FPGA. The simplest approach was to program the device, measure the real timings on the test bench, document them while pretending they had been your target all along, and then do your best not to change anything.

Oh, what fun we had. Frankly, many of us doubted that FPGAs would ever be successful (we certainly feel silly now). We had no idea that the capacity and performance of FPGAs would increase so quickly, or that logic synthesis tools would be ready to jump onto the scene with a fantastic fanfare of flugelhorns (my ears are still ringing), and that these tools would allow you to specify the timings you want and then do their best to achieve them. The rest, of course, is history—one that I would happily lay out in great detail if my friend Steve Leibson hadn’t already done so in exciting detail in his mega mini-series of columns here at EE Journal (see How the FPGA came about: Part 1, Part 2, Part 3, Part 4, Part 5And Part 6).

By the way, out of context, when we talk about the Sound Blocks Kickstarter (we weren’t, but now we are), as I said in my Building music machines with sound blocks Cool Beans Blog, I’ve already made my $15 donation for the Super Early Bird (50% off) special offer and I’m really hoping I can get the guys and gals over their $10,000 goal so I can play with Sound Blocks on my PC, so I’d appreciate anything you can do to spread the good news, but we digress…

Many FPGA companies have flourished and faded over the years, often with smaller FPGA vendors being acquired by larger collectives (“resistance is futile”). As a result, when most electronics design engineers who are not FPGA experts hear the term “FPGA,” they immediately think of well-known companies like Altera (which was acquired by Intel in 2015 and spun off as a wholly owned subsidiary earlier this year), Xilinx (which was acquired by AMD in 2022, although the acquisition was originally announced in 2020), and Lattice Semiconductor. Of course, there are other competitors, but these are the ones most people think of.

Interestingly, Lattice was almost acquired by Canyon Bridge Capital Partners in 2016, Canyon Bridge being a Chinese-backed private equity firm based in Silicon Valley that focuses on growing companies in China and other high-growth Asian markets. However, this sale was blocked by the US government in 2017 because Lattice’s technology is very well suited to military and aerospace applications. (Phew! We certainly dodged a bullet there (no pun intended)).

A related interesting point is that several semiconductor startups in China have taken their first steps in the FPGA space in recent years (see Steve Leibson’s FPGAs: Made in China Column). In some cases, this is to circumvent U.S. and European export restrictions. Another very real aspect – which has really been brought to the fore by the COVID19 pandemic – is the supply chain issues, which from China’s perspective are mitigated by its domestic semiconductor fabs and fab-less semiconductor companies.

All this leads us to a very interesting company called GOWIN Semiconductor. To be honest, I didn’t know as much about these little rascals as I should. Luckily, I just had a very interesting conversation with Mike Furnival (Vice President of International Sales), Daniel Fisher (Director of International Marketing) and Andrew Dudaronek (Marketing Engineer) who were kind enough to bring me up to speed.

We talked for ages (that’s quite a lot) but I’ll try to keep it brief, which is contrary to my usual style (I learned my overeager and rambling communication skills sitting on my mother’s lap). In short: GOWIN was founded in 2014, they saw their first silicon in 2015 and had their first revenue in 2017, and it’s all pretty damn fast, I can tell you that! In fact, they currently bill themselves as “the fastest growing FPGA company in the world” and who are we to disagree?

GOWIN was founded by two Chinese-Americans – Jason Zhu (CEO) and Dr. Ning Song (President) – both of whom were senior design managers at Lattice at the time (that is, until they left Lattice to start GOWIN). Although Altera and Xilinx have FPGA families that run the gamut from low to high, it is widely believed that in 2014 their hearts and minds were focused on the high-end devices. Meanwhile, the guys and gals at Lattice were happily carving out a position in the mid-range FPGA space (where no one can hear you scream).

Jason and Ning strongly believed that there was a market potential in the low-density FPGA space that was largely ignored by the other companies. I always think America is a place where you can get things done, but Jason and Ning had difficulty getting funding here. Since there was both market opportunity and access to funding in China, GOWIN started there. Today, GOWIN has R&D centers in China and Hong Kong, and international sales offices in China, Hong Kong, Korea, Vietnam, the UK, and the US.

But wait, there’s more… GOWIN started with low and medium density offerings in the form of their eFlash-based LittleBee devices (aka GW1N series) in 55nm (1K to 9K LUTs) and RAM-based Arora devices (aka GW2A series) in 55nm (18K to 55K LUTs). Their initial offerings had their own pinouts. However, the folks at GOWIN were soon faced with requests for pin-compatible spare parts for parts from other FPGA vendors, including components that were reaching end of life (EOL) and devices that were hard to find.

So it wasn’t long before the guys and gals at GOWIN came out with pin-compatible (i.e. ball-compatible) replacement parts for Altera, Lattice, and Xilinx FPGAs. As you can imagine, this put them in a perfect position to weather any supply chain storms caused by things like trade wars, tariffs, and global pandemics. Aside from anything else, many users are very pleased to know they have a second source for something.

Products from the past, present and future (Source: GOWIN)

It’s important to note that “pin compatibility” is not the same as “functional compatibility” – we’re not talking about a copy from scratch here. On the other hand, at this device level, if you compare parts with, say, 50K LUTs from any of the vendors, you’ll usually find that they have the same number of PLLs, roughly the same amount of block RAM (BRAM), and the same collection of features and functions. All of this means that porting a design – while not a simple recompilation – isn’t going to bring you to your knees (figuratively speaking). or literally).

Today, GOWIN’s FPGAs are used worldwide in a wide variety of applications and markets, including industrial (servo control, motion control, PLCs, industrial buses, industrial cameras, industrial printers, IO modules, 3D printers, renewable energy, utilities (gas, power), security, instrumentation, etc.), automotive (smart cockpits, multi-screen displays, local dimming, augmented reality head-up displays (AR-HUDs), assisted driving, electronic rearview mirrors, engine control, smart taillights, etc.), consumer (mobile phones, smart tablets and pads, electronic ink screens, VR/AR glasses, drones, TV ambient lighting, etc.) and others.

One of the reasons for our conversation was that Mike, Daniel and Andrew not only officially introduced me to GOWIN, but also told me about the latest and greatest addition to their lineup: the Arora V (also known as GW5A series) 22nm RAM-based medium-density (15K to 138K LUTs) FPGAs. These gorgeous beauties not only feature an ultra-low-power 22nm SRAM process from TSMC, but also hard 2.5Gbps MIPI cores (both D-PHY And C-PHY), hard PCIe cores, and 12.5 Gbps hard SerDes cores, along with integrated 1333 Mbit/s DDR3 memory and Arm Cortex-M4 or RISC-V processor cores. Even better, in addition to application solutions (reference designs) and development kits, all of these devices offer access to freely licensed IP and freely licensed EDA tools. What’s not to love?

Hmmm. Now that you ask, a question has come to mind, which is that China and America are not exactly best friends at the moment. I wondered out loud if that throws a bit of sand in the gears (or a wrench if you’re American). The GOWIN team responded (much like your humble narrator) that they actually represent the best of all possible worlds. First, they get the benefits of being based in China, which include low costs and access to highly skilled personnel. Second, you get a “can do” mentality coupled with the flexibility inherent in a smaller company, which allows them to respond quickly to changing customer needs and evolving market demands. Third, and this is the big icing on the allegorical cake, you get US-style management coupled with US-like corporate responsibility under US-mandated export control. Basically, everything about the company and its way of going to market internationally is based on the US way of doing things.

The fact that GOWIN is a China-based company that complies with US export controls is something that will keep me busy for some time (How…? Suppose…? What if…?). In the meantime, while I ponder this remarkable piece of knowledge in my poor old head, do you have any thoughts you’d like to share on anything you’ve read here?

Related